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 NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
April 2006
NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
General Description
The NC7WZ17 is a dual buffer with Schmitt trigger inputs from Fairchild's Ultra High Speed Series of TinyLogic(R) in the SC70 6-lead package. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC range. The inputs and outputs are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage. Schmitt trigger inputs typically achieve 1V hysteresis between the positive going and negative going input threshold voltage at 5V VCC.
Features
Space saving SC70 6-lead package Ultra small MicroPakTM Pb-Free leadless package Ultra high speed: tPD 3.6ns Typ into 50pF at 5V VCC High Output Drive: 24mA at 3V VCC Broad VCC operating range: 1.65V to 5.5V Matches the performance of LCX when operated at
3.3V VCC
Power down high impedance inputs/outputs Overvoltage tolerant inputs facilitate 5V to 3V
translation Patented noise/EMI reduction circuitry implemented
Ordering Information
Order Number
NC7WZ17P6X NC7WZ17P6X_NL(1) NC7WZ17L6X
Package Number
MAA06A MAA06A MAC06A
Package Code Top Mark
Z17 Z17 B5
Package Description
6-Lead SC70, EIAJ SC88, 1.25mm Wide Pb-Free 6-Lead SC70, EIAJ SC88, 1.25mm Wide Pb-Free 6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel 3k Units on Tape and Reel 5k Units on Tape and Reel
Pb-Free package per JEDEC J-STD-020B. Note: 1. "_NL" indicates Pb-Free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.
Logic Symbol
IEEE/IEC
A1 A2 1 Y1 Y2
TinyLogic(R) is a registered trademark of Fairchild Semiconductor Corporation. MicroPakTM is a trademark of Fairchild Semiconductor Corporation.
(c)2006 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
NC7WZ17 Rev. 1.0.4
NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
Connection Diagrams
Pin Assignment for SC70
A1 GND A2
1 6
Pin Descriptions
Pin Name
A1, A2 Y1, Y2
Description
Data Inputs Outputs
Y1 VCC Y2
2
5
3
4
Function Table
Y=A Input A
L H
(Top View)
Output Y
L H L = LOW Logic Level
Pin One Orientation Diagram
(Top View)
AAA
H = HIGH Logic Level
Pin One AAA represents Product Code Top Mark - see ordering code Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram).
Pad Assignments for MicroPak
A1 GND A2
1 2 3 6 5 4
Y1 VCC Y2
(Top Through View)
2 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
Absolute Maximum Ratings
The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
Symbol
VCC VIN VOUT IIK IOK IOUT ICC/IGND TSTG TJ TL PD Supply Voltage DC Input Voltage DC Output Voltage
Parameter
Rating
-0.5V to +7V -0.5V to +7V -0.5V to +7V -50mA -50mA 50mA 100mA -65C to +150C 150C 260C 180mW
DC Input Diode Current @ VIN < -0.5V DC Output Diode Current @ VOUT < -0.5V DC Output Current DC VCC/GND Current Storage Temperature Junction Temperature under Bias Junction Lead Temperature (Soldering, 10 seconds) Power Dissipation @ +85C
Recommended Operating Conditions(2)
Symbol
VCC VCC VIN VOUT TA JA Supply Voltage Operating Supply Voltage Data Retention Input Voltage Output Voltage Operating Temperature Thermal Resistance
Parameter
Rating
1.65V to 5.5V 1.5V to 5.5V 0V to 5.5V 0V to VCC -40C to +85C 350C/W
Note: 2. Unused inputs must be held HIGH or LOW. They may not float.
3 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
DC Electrical Characteristics
TA = +25C
-40C to +85C
Max
1.4 1.5 1.8 2.2 3.1 3.6 0.8 0.9 1.15 1.5 2.0 2.3 0.9 1.0 1.1 1.2 1.5 1.7
Symbol
VP
Parameter
Positive Threshold Voltage
Conditions
VCC (V)
1.65 1.8 2.3 3.0 4.5 5.5
Min
0.6 0.7 1.0 1.3 1.9 2.2 0.2 0.25 0.40 0.6 1.0 1.2 0.1 0.15 0.25 0.4 0.6 0.7 1.55 1.7 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8
Typ
1.0 1.07 1.38 1.74 2.43 2.88 0.5 0.56 0.75 0.98 1.42 1.68 0.48 0.51 0.62 0.76 1.01 1.20 1.65 1.8 2.3 3.0 4.5 1.52 2.14 2.75 2.62 4.13 0.0 0.0 0.0 0.0 0.0 0.08 0.10 0.16 0.24 0.25
Min
0.6 0.7 1.0 1.3 1.9 2.2 0.2 0.25 0.40 0.6 1.0 1.2 0.1 0.15 0.25 0.4 0.6 0.7 1.55 1.7 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8
Max
1.4 1.5 1.8 2.2 3.1 3.6 0.8 0.9 1.15 1.5 2.0 2.3 0.9 1.0 1.1 1.2 1.5 1.7
Units
V
VN
Netative Threshold Voltage
1.65 1.8 2.3 3.0 4.5 5.5
V
VH
Hystersis Voltage
1.65 1.8 2.3 3.0 4.5 5.5
V
VOH
HIGH Level Output Voltage
VIN = VIH IOH = -100A
1.65 1.8 2.3 3.0 4.5
V
IOH = -4mA IOH = -8mA IOH = -16mA IOH = -24mA IOH = -32mA
1.65 2.3 3.0 3.0 4.5 1.65 1.8 2.3 3.0 4.5
VOL
LOW Level Output Voltage
VIN = VIL IOL = 100A
0.1 0.1 0.1 0.1 0.1 0.24 0.3 0.4 0.55 0.55
0.1 0.1 0.1 0.1 0.1 0.24 0.3 0.4 0.55 0.55
V
IOL = 4mA IOL = 8mA IOL = 16mA IOL = 24mA IOL = 32mA
1.65 2.3 3.0 3.0 4.5
4 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
DC Electrical Characteristics (Continued)
TA = +25C
-40C to +85C
Max
0.1 1
Symbol
IIN IOFF
Parameter
Input Leakage Current Power Off Leakage Current Quiescent Supply Current
Conditions
VIN = 5.5V, GND VIN or VOUT = 5.5V
VCC (V)
0 to 5.5 0.0
Min
Typ
Min
Max
1.0 10
Units
A A
ICC
VIN = 5.5V, GND
1.65 to 5.5
1.0
10
A
5 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
AC Electrical Characteristics
TA =
+25C -40C to +85C
Symbol
Parameter
Conditions
CL = 15pF, RL = 1M
VCC (V)
1.65 1.8 2.5 0.2 3.3 0.3 5.0 0.5
Min
2.0 2.0 1.5 1.0 0.8 1.5 1.0
Typ
8.3 6.9 4.8 3.7 3.0 4.3 3.6 2.5 10 12
Max
14.3 11.9 8.2 5.6 4.7 6.6 5.6
Min
2.0 2.0 1.5 1.0 0.8 1.5 1.0
Max
15.8 13.1 9.0 6.2 5.2 7.3 6.2
Figure Units Number
ns Figure 1 Figure 3
tPLH, tPHL Propagation Delay
CL = 50pF, RL = 500, CIN CPD Input Capacitance Power Dissipation Capacitance Note 3
3.3 0.3 5.0 0.5 0 3.3 5.0
ns pF pF
Figure 1 Figure 3
Figure 2
Notes: 3. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
AC Loading and Waveforms
VCC Input CL* RL tr = 3ns *CL includes load and stray capacitance. Input PRR = 1.0MHz; tW = 500ns VCC Input GND
10% 90% 50% 90% 50%
Output tf = 3ns
Figure 1. AC Test Circuit
tW tPLH
10%
tPHL
VCC A Input Output
VOH
50% 50%
VOL
Input = AC Waveform; tr, tf = 1.8ns; PRR = 10MHz; Duty Cycle = 50%
Figure 3. AC Waveforms
Figure 2. ICCD Test Circuit
6 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
Tape and Reel Specification
Tape Format for SC70 Package Designator
P6X
Tape Section
Leader (Start End) Carrier Trailer (Hub End)
Number Cavities
125 (typ) 3000 75 (typ)
Cavity Status
Empty Filled Empty
Cover Tape Status
Sealed Sealed Sealed
Tape Dimension inches (millimeters)
Package
SC70-6
Tape Size
8mm
Dim A
0.093 (2.35)
Dim B
0.096 (2.45)
Dim F
Dim KO
Dim P1
0.157 (4)
Dim W
0.315 0.004 (8 0.1)
0.138 0.004 0.053 0.004 (3.5 0.10) (1.35 0.10)
7 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
Tape and Reel Specification (Continued)
Reel Dimension for MicroPak inches (millimeters)
Tape Size
8 mm
A
7.0 (177.8)
B
0.059 (1.50)
C
0.512 (13.00)
D
0.795 (20.20)
N
2.165 (55.00)
W1
0.331 + 0.059/-0.000 (8.40 + 1.50/-0.00)
W2
0.567 (14.40)
W3
W1 + 0.078/-0.039 (W1 + 2.00/-1.00)
8 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
Tape and Reel Specification (Continued)
Tape Format for MicroPak Package Designator
L6X
Tape Section
Leader (Start End) Carrier Trailer (Hub End)
Number Cavities
125 (typ) 3000 75 (typ)
Cavity Status
Empty Filled Empty
Cover Tape Status
Sealed Sealed Sealed
Tape Dimension inches (millimeters)
9 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
Physical Dimensions inches (millimeters) unless otherwise noted
6-Lead SC70, EIAJ SC88, 1.25mm Wide Package Number MAA06A
10 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 6-Lead MicroPak, 1.0mm Wide Package Number MAC06A
11 NC7WZ17 Rev. 1.0.4
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NC7WZ17 TinyLogic(R) UHS Dual Buffer with Schmitt Trigger Inputs
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM 2 E CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM
DISCLAIMER
ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM
PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3
SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDiS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I18
12 NC7WZ17 Rev. 1.0.4
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